/* EV386EX.h */

/* 80386EX REGISTER DEFINITIONS */
#define _SetEXRegWord(reg,val)  (outpw(reg,val))
#define _SetEXRegByte(reg,val)  (outp(reg,val))
#define _ReadEXRegWord(val,reg) (val=inpw(reg))
#define _GetEXRegByte(reg)      inp(reg)
#define _GetEXRegWord(reg)      inpw(reg)

/*********************** Global typedef **********************/
typedef unsigned char BYTE; /* 8-bit value */
typedef unsigned short WORD; /* 16-bit value */
typedef unsigned long DWORD; /* 32-bit value */
/******************** Global Used defines ********************/

/* Error Flags */
#define E_OK 0
#define E_INVALID_DEVICE 1
#define E_INVALID_VECTOR 2
#define E_BADVECTOR 3
#define INTERRUPT_ISR 1
#define TRAP_ISR 2
#define IDT_ALIAS 2 /* Only valid for protected mode */
#define TRAP_TYPE 0x8f00 /* Only valid for protected mode */
#define INTR_TYPE 0x8e00 /* Only valid for protected mode */
#define LOBYTE(w) ((BYTE)(w))
#define HIBYTE(w) ((BYTE)(((WORD)(w) >> 8) & 0xFF))
#define LOWORD(l) ((WORD)(DWORD)(l))
#define HIWORD(l) ((WORD)((((DWORD)(l)) >> 16) & 0xFFFF))

/*** Bit Masks ***/
#define BIT0MSK 0x1
#define BIT1MSK 0x2
#define BIT2MSK 0x4
#define BIT3MSK 0x8
#define BIT4MSK 0x10
#define BIT5MSK 0x20
#define BIT6MSK 0x40
#define BIT7MSK 0x80

/*** Global Function ***/
extern void _EnableExtIOMem(void);

/******* Interrupt Control Unit configuration defines ********/
/* ICU Modes */
#define ICU_SFNM 0x10
#define ICU_AUTOEOI 0x2
#define ICU_TRIGGER_LEVEL 0x8
#define ICU_TRIGGER_EDGE 0x0

/* ICU Master Pins */
#define MPIN_INT0 0x4
#define MPIN_INT1 0x8
#define MPIN_INT2 0x10
#define MPIN_INT3 0x20

/* ICU Master External Cascade IRs */
#define MCAS_IR1 0x2
#define MCAS_IR2 0x4
#define MCAS_IR5 0x20
#define MCAS_IR6 0x40
#define MCAS_IR7 0x80

/* ICU Slave Pins */
#define SPIN_INT4 0x1
#define SPIN_INT5 0x2
#define SPIN_INT6 0x4
#define SPIN_INT7 0x8

/* ICU IRQ Mask Values*/
#define IR0 0x1
#define IR1 0x2
#define IR2 0x4
#define IR3 0x8
#define IR4 0x10
#define IR5 0x20
#define IR6 0x40
#define IR7 0x80

/* ICU EOI Types */
#define NONSPECIFIC_EOI 0x20
#define SPECIFIC_EOI 0x60
#define NonSpecificEOI() _SetEXRegByte(OCW2S,NONSPECIFIC_EOI); _SetEXRegByte(OCW2M,NONSPECIFIC_EOI)
#define MstrSpecificEOI(irq)  _SetEXRegByte(OCW2M, 0x60 | ((BYTE)((irq) & 0x7)))
#define SlaveSpecificEOI(irq) _SetEXRegByte(OCW2S, 0x60 | ((BYTE)((irq) & 0x7)))
#define Master 1
#define Slave 0

/* ICU Function Definitions */
extern int InitICU (BYTE MstrMode, BYTE MstrBase, BYTE MstrCascade,
BYTE SlaveMode, BYTE SlaveBase,BYTE MstrPins,BYTE SlavePins);
extern int InitICUSlave(BYTE SlaveMode, BYTE SlaveBase, BYTE SlavePins);
extern void SetInterruptVector(void (far interrupt *IntrProc)(void),int Vector, int IntrType);
extern int SetIRQVector(void (far interrupt *IntrProc)(void), int IRQ,int IntrType);
extern void Enable8259Interrupt(BYTE MstrMask, BYTE SlaveMask);
extern void Disable8259Interrupt(BYTE MstrMask, BYTE SlaveMask);
extern int Poll_Command(int Master_or_Slave);

/************ Asynchronous Serial I/O Port defines ***********/
#define SIO_0 0
#define SIO_1 1
#define SIO0_IRQ 4 /* IRQ # Master IRQ4 */
#define SIO1_IRQ 3 /* IRQ # Master IRQ3 */
#define SIO_5DATA 0x0
#define SIO_6DATA 0x1
#define SIO_7DATA 0x2
#define SIO_8DATA 0x3
#define SIO_1STOPBIT 0x0
#define SIO_2STOPBIT 0x4
#define SIO_NOPARITY 0x0
#define SIO_ODDPARITY 0x8
#define SIO_EVNPARITY 0x18
#define SIO_FRC0PARITY 0x28
#define SIO_FRC1PARITY 0x38
#define SIO_SETBREAK 0x40
#define SIO_INTERNAL_SRC 0x1
#define SIO_EXTERNAL_SRC 0x0
#define SIO_CLKSRC_CLK2 0x1
#define SIO_CLKSRC_COMCLK 0x0
#define SIO_INTR_NONE 0
#define SIO_INTR_RBF 0x1
#define SIO_INTR_TBE 0x2
#define SIO_INTR_RLS 0x4
#define SIO_INTR_MS 0x8
#define SIO_MCR_LOOP_BACK 0x10
#define SIO_MCR_OUT2 0x8
#define SIO_MCR_OUT1 0x4
#define SIO_MCR_RTS 0x2
#define SIO_MCR_DTR 0x1
#define SIO_8N1 (SIO_8DATA|SIO_1STOPBIT|SIO_NOPARITY)
#define SIO_7N1 (SIO_7DATA|SIO_1STOPBIT|SIO_NOPARITY)

/* Status Bits */
#define SIO_ERROR_BITS 0x1e
#define SIO_RX_BUF_FULL 0x1
#define SIO_OVERRUN 0x2
#define SIO_PARITY_ERR 0x4
#define SIO_FRAMING_ERR 0x8
#define SIO_BREAK_INTR 0x10
#define SIO_TX_BUF_EMPTY 0x20
#define SIO_TX_EMPTY 0x40

/* Offsets from beginning of SIO port addresses */
#define RBR 0
#define TBR 0
#define DLL 0
#define IER 1
#define DLH 1
#define IIR 2
#define LCR 3
#define MCR 4
#define LSR 5
#define MSR 6
#define SCR 7
#define SIO0_BASE 0xF4F8
#define SIO1_BASE 0xF8F8

/* Define Function Macros */
#define GetSIO0Status() _GetEXRegByte(LSR0)
#define GetSIO1Status() _GetEXRegByte(LSR1)
#define GetSIO0InterruptID() _GetEXRegByte(IIR0)
#define GetSIO1InterruptID() _GetEXRegByte(IIR1)
#define GetSIO0ModemStatus() _GetEXRegByte(MSR0)
#define GetSIO1ModemStatus() _GetEXRegByte(MSR1)
#define GetSIO0Char() _GetEXRegByte(RBR0)
#define GetSIO1Char() _GetEXRegByte(RBR1)
#define ChangeSIO0IntrSrc(src) _SetEXRegByte(IER0,src)
#define ChangeSIO1IntrSrc(src) _SetEXRegByte(IER1,src)
#define ChangeSIO0Mode(Mode) _SetEXRegByte(LCR0,Mode)
#define ChangeSIO1Mode(Mode) _SetEXRegByte(LCR1,Mode)
#define DisableSIO0Interrupt(src) _SetEXRegByte(IER0,_GetEXRegByte(IER0) & !(src))
#define DisableSIO1Interrupt(src) _SetEXRegByte(IER1,_GetEXRegByte(IER1) & !(src))

/* SIO Function Definitions */
extern int InitSIO (int Unit, BYTE Mode, BYTE ModemCntrl, DWORD BaudRate,DWORD BaudClkIn);
extern BYTE SerialReadChar(int Unit);
extern int SerialReadStr(int Unit, char far *str, int count);
extern void SerialWriteChar(int Unit, BYTE ch);
extern void SerialWriteStr(int Unit, const char far *str);
extern void SerialWriteMem(int Unit, const char far *mem, int count);
void interrupt far Serial0_ISR(void);
extern void Service_RBF (void);
extern void SerialWriteStr_Int(int Unit, const char far *str);
extern void Service_TBE(void);

/***************** DMA configuration defines *****************/

typedef enum {
 DMA_Channel0 = 0,
 DMA_Channel1 = 1
} DMAChannelEnum;

typedef enum {
 ERR_NONE = 0,
 ERR_BADINPUT = -1
} ERREnum;

/* DMA Function Definitions */
int SetDMAReqIOAddr(int nChannel, WORD wIO);
int SetDMATargMemAddr(int nChannel, void *ptMemory);
int SetDMAXferCount(int nChannel, DWORD lCount);
int EnableDMAHWRequests(int nChannel);
int DisableDMAHWRequests(int nChannel);
void InitDMA(void);
void InitDMA1ForSerialXmitter(void);

/*************** Port I/O configuration defines **************/
/* Port 1 configuration defines */
#define DCD0    0x1
#define RTS0    0x2
#define DTR0    0x4
#define DSR0    0x8
#define RI0     0X10
#define LOCK    0x20
#define HOLD    0X40
#define HOLDACK 0X80

/* Port 2 configuration defines */
#define CS0  0x1
#define CS1  0x2
#define CS2  0x4
#define CS3  0x8
#define CS4  0X10
#define RXD0 0x20
#define TXD0 0X40
#define CTS0 0X80

/* Port 3 configuration defines */
#define TMROUT0 0x1
#define TMROUT1 0x2
#define INT0   0x4
#define INT1   0x8
#define INT2   0x10
#define INT3   0x20
#define PWRDWN 0x40
#define COMCLK 0x80

/* Port Direction defines */
#define P0_IN 0x1
#define P1_IN 0x2
#define P2_IN 0x4
#define P3_IN 0x8
#define P4_IN 0x10
#define P5_IN 0x20
#define P6_IN 0x40
#define P7_IN 0x80
#define Px_OUT 0

/* Pin configuration defines */
#define RTS1 0x1
#define SSIOTX 0
#define DTR1 0x2
#define SRXCLK 0
#define TXD1 0x4
#define DACK1 0
#define CTS1 0x8
#define EOP 0
#define CS5 0x10
#define DACK0 0
#define TIMER2 0x20
#define COPROC 0
#define REFRESH 0x40
#define CS6 0

/* Port I/O Function Definitions */
extern void Init_IOPorts (BYTE Port1, BYTE Port2, BYTE Port3, BYTE PortDir1,
BYTE PortDir2, BYTE PortDir3, BYTE PortLtc1, BYTE PortLtc2, BYTE PortLtc3);

/**************** Timer configuration defines ****************/
#define TMR_0 0
#define TMR_1 1
#define TMR_2 2
#define TMR0_IRQ 0 /* IRQ # Master IRQ0 */
#define TMR1_IRQ 10 /* IRQ # Slave IRQ2 */
#define TMR2_IRQ 11 /* IRQ # Slave IRQ3 */

/* Timer Modes */
#define TMR_TERMCNT 0
#define TMR_1SHOT (1<<1)
#define TMR_RATEGEN (2<<1)
#define TMR_SQWAVE (3<<1)
#define TMR_SW_TRIGGER (4<<1)
#define TMR_HW_TRIGGER (5<<1)

/* Count Type */
#define TMR_CLK_BCD 1
#define TMR_CLK_BIN 0

/* Timer Pin Configuration */
#define TMR_CLK_INTRN 0
#define TMR_CLK_EXTRN 0x1
#define TMR_GATE_VCC 0
#define TMR_GATE_EXTRN 0x2
#define TMR_OUT_ENABLE 0x1
#define TMR_OUT_DISABLE 0
#define TMR_ENABLE 1
#define TMR_DISABLE 0

/* Timer Macros Definitions */
#define DisableTimer() _SetEXRegByte( TMRCFG, (_GetEXRegByte(TMRCFG) | 0x80))
#define EnableTimer()  _SetEXRegByte( TMRCFG, (_GetEXRegByte(TMRCFG) & 0x7f))

/* Timer Function Definitions */
extern int InitTimer (int Unit, WORD Mode, BYTE Inputs, BYTE Output,
WORD InitCount, int Enable);
extern void SetUp_ReadBack (BYTE Timer0, BYTE Timer1, BYTE Timer2,
BYTE GetStatus, BYTE GetCount);
extern WORD CounterLatch(BYTE Timer);
extern WORD ReadCounter(BYTE Timer);
void interrupt far TimerISR(void);

/**************** SSIO configuration defines *****************/
#define SSIO_TUE 0x80 /* Transmit Underflow Error */
#define SSIO_THBE 0x40 /* Transmit Holding Buffer Empty */
#define SSIO_TX_IE 0x20 /* Transmit Interrupt Enable */
#define SSIO_TX_ENAB 0x10 /* Transmitter Enable */
#define SSIO_ROE 0x08 /* Receive Overflow Error */
#define SSIO_RHBF 0x04 /* Receive Holding Buffer Full */
#define SSIO_RX_IE 0x02 /* Receive Interrupt Enable */
#define SSIO_RX_ENAB 0x01 /* Receiver Enable */
#define SSIO_TX_MASTR 0x02 /* Transmit Master Mode */
#define SSIO_RX_MASTR 0x01 /* Receive Master Mode */
#define SSIO_TX_SLAVE 0
#define SSIO_RX_SLAVE 0
#define SSIO_CLK_SERCLK 0x01 /* Baud Rate Clocking Source: SERCLK = CLK2/4 */
#define SSIO_CLK_PSCLK 0x00 /* Baud Rate Clocking Source: PSCLK = (CLK2/2) / (CLKPRS+2) */
#define SSIO_BAUD_ENAB 0x80 /* Enable Baud Rate Generator */

/* SSIO Function Definitions */
extern void InitSSIO (BYTE Mode, BYTE MasterTxRx, BYTE BaudValue, BYTE PreScale);
extern WORD SSerialReadWord(BYTE MasterSlave);
extern void SSerialWriteWord(WORD Ch,BYTE MasterSlave);
void interrupt far SSIO_ISR(void);
extern void Service_RHBF(void);
extern void Service_THBE(void);

/********************* Watch Dog Timer ***********************/
#define SetWatchDogReload(ReloadHi,ReloadLow)\
 _SetEXRegWord(WDTRLDL,ReloadLow);_SetEXRegWord(WDTRLDH,ReloadHi);
#define WatchDogClockDisable()\
 _SetEXRegByte(WDTSTATUS, _GetEXRegByte(WDTSTATUS) | BIT0MSK)
#define WatchDogClockEnable()\
 _SetEXRegByte(WDTSTATUS, _GetEXRegByte(WDTSTATUS) & ~BIT0MSK)

/* Watch Dog Timer Function Definitions */
extern void ReLoadDownCounter(void);
extern DWORD GetWDT_Count(void);
extern void WDT_BusMonitor(BYTE EnableDisable);
extern void EnableWDTInterrupt(void);
void interrupt far wdtISR(void);

/********************Refresh Control Unit*********************/
#define EnableRCU()  _SetEXRegWord(RDFSCON, _GetEXRegWord(RDFSCON) | 0x8000)
#define DisableRCU() _SetEXRegWord(RDFSCON, _GetEXRegWord(RDFSCON) & 0x7fff)

/* Refresh Control Unit Function Definitions */
extern int InitRCU(WORD counter_value);
extern WORD Get_RCUCounterValue(void);

/****************Clock and Power Management Unit**************/
#define IDLE   0x02
#define PWDWN  0x01
#define ACTIVE 0x00

/* Clock and Power Management Function Definitions */
extern int Set_Prescale_Value(WORD prescale);
extern void Enter_Idle_Mode(void);
extern void Enter_Powerdown_Mode(void);
extern void Mode_Setting_To_Active(void);

/* End of EV386EX.h */